The University of South Carolina
Department of Electrical Engineering
Thesis Defense
Signal Integrity Validation for High-Speed Serial Links
A Case study: Serial ATA Gen2
Alex Messan
Candidate, Masters of Science, Electrical Engineering
Advisor: Dr. Yinchao Chen
When: Wednesday, November 15, 2005, at 10:00AM
Where: Room 3A75 in Swearingen Center
Abstract:
Signal Integrity validation is becoming more and more important as signal data rates increase to 3Gb/s and above. At these rates signal quality issues become abundant. To avoid disaster and costly recalls after production, a detailed and thorough validation work must be completed to insure these issues are uncovered and dealt with before mass production.
This work focuses on Serial ATA Gen2 electrical validation. However the tests and methodologies described here can be applied to various other serial interfaces as well.
Serial ATA Gen2 runs at 3 Gb/s with edge rate as fast as 67 ps.
First we describe the tests performed during the validation cycle. These include Transmitter and Receiver electrical tests, Out of Band signaling tests, and link media tests using Time-Domain Reflectometry (TDR) and Vector Network Analyzer (VNA) equipments.
Second we describe methodologies to complete these tests. Here we present challenges we faced during the validation work and how these have been surmounted. We also present some of the lab measurements results.
Finally, we provide suggestions for accurate lab data collection when working with these fast serial links and present key learnings from the project.
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